MIXER CIRCUIT
Assignee
SECRETARY OF STATE FOR DEFENCE, THE IN HER BRITANNIC MAJESTY'S GOVERNMENT OF THE UNITED KINGDOM OF GREAT BRITAIN AND NORTHERN IRELAND, A BRITISH CORPORATION SOLE OF
Filed
May 8, 1984
Granted
Jul 9, 1996
Location
STAKEFORD GB
Abstract
A mixer circuit (1), comprised of two planar dipoles (3, 5), mounted upon a dielectric insulator or semiconductor body. Mixer elements (M1, M2) are incorporated in the path of each dipole (3, 5), there being two such elements each fed by both dipoles. The first of these dipoles, dipole (5) is split along part of its length, this split section (23) serving as a delay-line between one of the mixer elements, element (M1), and the second dipole (3). The second dipole (3) is split along at least a part of its length and is open at one end. A connective link (29C) is provided between one of the delay-line conductors (25/11) and one of the split parts (9) of the second dipole (3). Intermodulation signal developed in the one mixer (M1;M2) can then be extracted from the split ends (9, 13; 7, 11)of the second dipole (3). The link (29C) is formed outside the envelope of the delay-line (23) and does not affect its broad band properties. A slowing mechanism--for example, combine interdigitated structure (31) can be included in the delay-line (23). Preferably the link (23C) runs parallel to a significant portion of the length of the second dipole (3), the latter thus modified forming a folded dipole.
Source: Google Patents
35 USC §181 Secrecy Order
Imposed
Nov 6, 1984
Rescinded
Jan 14, 1993
Duration
8 years, 2 months
Inventor
- 1DAVID J. GUNTON
Record Details
- Patent number
- US 5535445
- Application
- 06623162
- Aerospace match
- No
- Dataset source
- 35 USC §181 SO records