ASSEMBLY OF SEMICONDUCTOR CHIPS
Assignee
TEXAS INSTRUMENTS INCORPORATED, 13500 NORTH CENTRAL EXPRESSWAY, DALLAS, TEXAS 75265, A CORP. OF DE.
Filed
Aug 9, 1988
Granted
Jun 18, 1991
Location
CARROLLTON TX US
Abstract
A three dimensional package having at least one semiconductor chip having input/output conductive pads along its periphery includes a dielectric carrier over at least a portion of the chip and a plurality of conductors mounted on the carrier between the chip and the dielectric carrier. The plurality of conductors are mounted within the periphery of the chip with one end connected to the conductive pads and with the other end of the plurality of conductors exiting from the same side of the chip. The plurality of conductors exiting from the same side are electrically coupled to an interconnect substrate.
Source: Google Patents
35 USC §181 Secrecy Order
Imposed
Mar 10, 1989
Rescinded
Jun 22, 1989
Duration
3 months
Inventor
- 1RANDALL E. JOHNSON
Record Details
- Patent number
- US 5025306
- Application
- 07230203
- Aerospace match
- No
- Dataset source
- 35 USC §181 SO records