Research/Patents/US 5022027
US 5022027Tier 3 — General Defense

COMMUNICATIONS INTERFACE AND SYSTEM FOR RADIATION RECOVERY OF A MICROPROCESSOR PORTION THEREOF

Assignee

US Government

Filed as: UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY

Filed

May 27, 1982

Granted

Jun 4, 1991

Location

BELTSVILLE MD US

Abstract

A communications interface and system is configured to allow circumventionrecovery of control after radiation) of a microprocessor portion thereof. The communications interface portion, including a hard memory interface device serves as a communications link to the microprocessor. The system is configured so that a transient upset from prompt gamma radiation is detected and a circuit freeze of the stored information in the system is carried out until the transient subsides. The system then restores the microprocessor to the preirradiation condition and resumes operation. Accordingly, the hard memory interface device of the communications interface, controls a READ operation and CLEAR and WRITE operations in addition to generating signals to control the "handshaking" between the hard memory of the communications interface and the aforementioned microprocessor.

Source: Google Patents

35 USC §181 Secrecy Order

Imposed

Aug 9, 1985

Rescinded

Sep 26, 1990

Duration

5 years, 1 month

Inventor

  • 1JESUS A. ROSARIO

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Back to patent indexSource: USPTO 35 USC §181 secrecy order records