Research/Patents/US 4958315
US 4958315

SOLID STATE ELECTRONIC EMULATOR OF A MULTIPLE TRACK MOTOR DRIVEN ROTATING MAGNETIC MEMORY

Assignee

NAVY, UNITED STATE OF AMERICAN AS RESPRESENTED BY THE SECRETARY OF

Filed

Jul 2, 1985

Granted

Sep 18, 1990

Location

San Diego CA (SAIC/General Dynamics)

Abstract

A system for emulating the memory characteristics of a motor-driven rotat memory having multiple heads per track and/or single heads per track with odd modular memory lengths. It is intended as a cost effective alternative for replacing magnetic rotating memories. The emulation is accomplished by multiplexing an offset memory address during each bit time. Non-volatile memory arrays translate the memory address to an offset address that is proportional to the odd modular track length of the multiple/single head track. Input/output registers are used for each read/write head that is emulated. An emulation address controller is used to generate all timing and initial addresses.

Source: Google Patents

35 USC §181 Secrecy Order

Imposed

Apr 25, 1986

Rescinded

May 4, 1990

Duration

4 years

Inventor

  • 1KRIS S. BALCH

Sensitive facility: San Diego CA (SAIC/General Dynamics)

Record Details

Patent number
US 4958315
Application
00675135
Aerospace match
No
Dataset source
35 USC §181 SO records
Back to patent indexSource: USPTO 35 USC §181 secrecy order records