SIGNAL DETECTING CIRCUIT
Assignee
Filed
Dec 23, 1976
Granted
Feb 5, 1985
Location
IT
Abstract
A time averaging circuit which increases significantly the signal to noise ratio of a received signal. The output of a multiplier which provides near D.C. signals with the noise is fed to a metal core transformer through an operational amplifier. The secondary winding output of the transformer is partly subtracted from the input in the operational amplifier, enhancing the D.C.-like signal components. Time integration via the feed back loop results in the A.C. noise components being relatively reduced in amplitude. The A.C. noise components from the secondary of the transformer and the output of the operational amplifier are subtracted in a second operational amplifier, the output signal of which has substantially increased signal to noise ratio. A pre-processing circuit includes a multiplier which multiplies the received signal with a narrow band-width portion thereof, tuned to the signal frequency, which enriches the near D.C. energy.
Source: Google Patents
35 USC §181 Secrecy Order
Imposed
Dec 18, 1981
Rescinded
Mar 31, 1983
Duration
1 year, 3 months
Inventor
- 1NOEL O. FOTHERGILL
Record Details
- Patent number
- US 4498052
- Application
- 05756613
- Aerospace match
- Yes
- Dataset source
- 35 USC §181 SO records
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